RAM. Structure and device (RAM, RAM) / Habr

Short description

Random Access Memory (RAM) is a crucial component of a computer system. It serves as a buffer between the hard drive and the processor, allowing for quick access to necessary data and commands that the processor needs to function smoothly. RAM is made up of microcircuits that have many layers, with each layer consisting of rectangular matrices of cells. One cell contains one bit of information and is made up of a field-effect transistor and a capacitor. The capacitor stores information, while the transistor acts as an electric key that holds the charge on the capacitor or opens it for reading. There are several form factors of RAM modules, including DIMMs and SO-DIMMs, which have two independent rows of contacts on each side. ECC memory is also widely used in servers and workstations, as it provides an additional memory bank every eight microcircuits to check for and eliminate errors. DDR SDRAM of the 4th and 5th generation is commonly used in modern computers, with each new generation increasing bandwidth without increasing the frequency of memory cells.

RAM. Structure and device (RAM, RAM) / Habr

RAM is an important part of any computer system and now I will explain why this is so.


During operation, the memory acts as a buffer between the drive and the processor, i.e. data is first read from the hard disk (or other drive) into the RAM and only then processed by the central processor.

A simplified diagram of computer memory

Such a scheme is used because the processor is a very fast device and it needs to quickly access the necessary data and commands, otherwise it will idle and the performance of the system will decrease, and since the hard disk and SSD cannot provide the necessary speed, all the necessary data is read and moved into faster RAM and are stored there until the processor needs them for processing.

Physically, the RAM is a set of microcircuits soldered to the board.

Microcircuits on the memory board

If you look inside one such microcircuit, you can see that it consists of many layers connected to each other, each layer consists of a huge number of cells that form rectangular matrices. One cell can contain 1 bit of information, and it consists of one field-effect transistor and one capacitor.

Arrangement of a cell in a chip

This design looks quite complicated and may differ depending on the technologies used, so for clarity it is better to imagine the cell in the form of a diagram.

Schematic device of a dynamic memory cell

So it is easier to understand that it is the capacitor that stores information, and the transistor acts as an electric key that holds the charge on the capacitor, or opens it for reading. When the capacitor is charged, you can get a logical one, and when it is discharged, you can get a zero.

Simplified scheme of the array of cells, page

There are a lot of such capacitors in the chip, but it is impossible to count the charge from one specific cell, the whole page is read in its entirety.

To do this, it is necessary to send a signal to the horizontal line we need, which is called a row, which will open the transistors, after which the amplifiers located at the ends of the vertical lines consider the charges that were on the capacitors.

Simplified cell array scheme (reading)

Each such reading empties the charges on the page, due to which it has to be rewritten, for this, a charge is also applied to the row, which opens the transistor, and a higher voltage is applied to the column, thereby charging the capacitors and recording information.

Simplified cell array scheme (record)

Delays between these operations are called “Latency” or popularly called “Timings”, the smaller they are, the faster the entire system as a whole

In addition to the memory chips themselves, SMD-components, resistors and capacitors are soldered to the module, which provide signal circuits and chip power supply, as well as the SPD microcircuit is a special microcircuit that stores data on the parameters of the entire module (capacity, operating voltage, timings, number of banks and so on). This is necessary so that when the system starts, the BIOS on the motherboard sets the optimal settings according to the information displayed on the microcircuit.

SPD memory die components

There are also several form factors of modules, modules for computers are called DIMMs, and for laptops and compact systems SO-DIMMs, they differ in size and number of contacts for connection. These are two-row modules that have two independent rows of contacts, one on each side.


For example, in the old Simm modules, the contacts on both sides were closed and they could only transmit 32 bits of information per clock, while dimms can transmit 64 bits.


In addition, modules are divided into single-level, two-level and four-level modules. A rank is a block of data with a width of 64 bits, which can be filled by a different number of memory chips. Peer memory is 64 bits wide, while dual memory is 128 bits wide. But since one memory channel is only 64 bits wide, like a peer module, the memory controller can only access one rank at a time. While a two-rank module can deal with the response to the command passed to it, and the other rank can already prepare information for the next command, which increases productivity.

Ranks of RAM

I would also like to say separately about memory with error correction, ECC memory, because these modules have an additional memory bank every 8 microcircuits. Additional banks and logic in the module serve to check and eliminate errors.

ECC – memory with error correction

Using buffers and error correction slightly degrades performance, but greatly improves data reliability. Therefore, ECC memory is widely used in servers and workstations.

Data width in ECC

I will talk a little more about the types of memory, because in modern computers, synchronous dynamic memory with random access and doubled data transfer rate DDR SDRAM of the 4th generation is used, and soon the fifth will be common.

Synchronous dynamic memory (DDR)

DDR type memory replaced SDR type memory. SDR SDRAM works synchronously with the controller. In it, the internal and external data bus operates at the same frequency. When a signal is applied to the chip, information is read synchronously and transferred to the output buffer. The transfer of each bit from the buffer occurs with each cycle of the memory core. In SDR memory, synchronization of data exchange occurs on the edge of the clock pulse.

Synchronous Dynamic Memory (SDR)

When a signal is applied to the chip, information is read synchronously and transferred to the output buffer. The transfer of each bit from the buffer occurs with each cycle of the memory core. In SDR memory, synchronization of data exchange occurs on the edge of the clock pulse.

SDR (diagram)

After SDR, DDR memory came out, in which data exchange on the external bus is not only on the edge of the clock pulse, but also on the fall, due to which twice as much information can be transferred at the same frequency, and to take advantage of this increase, the internal bus was expanded twice. That is, working at the same frequencies as SDR, DDR memory transmits 2 times more data.

SDR and DDR (Diagram)

The next generations of DDR memory do not differ much, only the frequency of operation of the input/output buffers increases, and the bus connecting the memory core with the buffers expands, the principle of operation itself does not change, but even so, each new generation receives in this way, a significant increase in bandwidth, without increasing the frequency of the memory cells themselves.

(Scheme) DDR 2, DDR 3, DDR 4, DDR 5

It is clear that with each new generation, the work of logic, technical process and much more improves. But the very principle of operation remains the same, and this is enough for a general understanding.

Below I will leave the video version of the article, maybe someone will be interested in watching the 3D animation of the memory bars. That’s all for me, that’s all for now.

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