Intel, Marvell and Synopsys are preparing for DDR6 – the speed of controllers will reach 224 Gbps at the base level

Intel, Marvell and Synopsys are preparing for DDR6 – the speed of controllers will reach 224 Gbps at the base level

From February 18 to 22, the next IEEE Solid State Circuit conference will be held in San Francisco, during which leading microcircuit developers will talk about promising projects.

In particular, Intel, Marvell and Synopsys will announce their own developments in the field of signal interfaces for RAM of the future. Each of them represents circuits for a 3-nm technology process with a speed of up to 224 Gbps, Tech News Space reports.

It is expected that the specifications of the DDR6 memory standard will be adopted in 2024. The data transfer rate on each data bus pin is between 12.8 Gbps and 17 Gbps. Of course, this requires updated protocols and new circuit solutions.

Intel, Marvell and Synopsys are preparing to introduce DDR6 and future versions of RAM, which they plan to talk about in more detail soon.

Intel’s report talks about the organization of the physical layer (PHY) of the memory signal interface, which is essentially analog. At this stage, it is important to reduce the noise level and ensure the best synchronization of signals, which in turn depends on the characteristics of the transistors and directly on the manufacturing process of the controller.

Intel has reportedly adapted the DAC circuit for 3nm FinFET transistors. Consumption is 3 pJ/bit. This is very good because the increase in consumption should remain limited even with the increase in bandwidth.

Synopsys provides licensed (IP) circuits for a transceiver with similar properties. The Synopsys solution also offers a maximum interface speed of up to 224 Gbps with a consumption of up to 3 pJ/bit.

Synopsys circuits are also designed for 3nm FinFET technology. Incidentally, this is being ignored by Samsung, which is switching to GAAFETs within 3nm production.

Marvell, a well-known developer of controllers and signal processors, including a solution for SSD, presents its solution for high-performance RAM of the future.

Marvell’s digital controller in the form of a signal processing and transmission unit will provide speeds of up to 212 Gbit/s using a 5nm FinFET process. A significant margin in operating speed leaves room for further increases in RAM speed beyond expectations for the DDR6 standard, which is important for AI and machine learning applications.

Read also on ProIT: In 2024, Intel plans to mass produce the 15th generation Arrow Lake with a 2nm (20A) chip.

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